General Purpose I/O Header
One 8-bit General Purpose I/O (GPIO) header is located at JGP1. The GPIO header is a general purpose I/O expander on a pin header via the SMBus. Each pin can be configured to be an input pin or output pin in 2.54-mm pitch. The GPIO is controlled via the PCA9554APW 8-bit GPIO expansion from the PCH SMBus. The base address is 0xEFA0. The expander slace address is 0x4D for WRITE/READ.
For a detailed diagram of the A4SAN-H/-E/-L/-WOHS motherboard, see the layout under Quick Reference.
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GPIO Header Pin Definitions: 10 Total |
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|---|---|---|---|
|
Pin# |
Description |
Pin# |
Description |
|
1 |
P3V3SB |
2 |
GND |
|
3 |
GP_P3V3_GP0 |
4 |
GP_P3V3_GP4 |
|
5 |
GP_P3V3_GP1 |
6 |
GP_P3V3_GP5 |
|
7 |
GP_P3V3_GP2 |
8 |
GP_P3V3_GP6 |
|
9 |
GP_P3V3_GP3 |
10 |
GP_P3V3_GP7 |