I²C Buses for VRM

Jumpers JVRM1 and JVRM2 allow the BMC to access CPU and memory VRM controllers.

For a detailed diagram of the X14SBI-TF motherboard, see the layout under Motherboard Quick Reference.

JVRM1 Jumper Settings Jumper Setting Definition Pins 1–2 SMB Data (to BMC)

JVRM2 Jumper Settings Jumper Setting Definition Pins 1–2 SMB CLOCK (to BMC)