CPU1 Configuration Menu

►CPU1 Configuration

►PCI Express 0 / PCI Express 1 / PCI Express 2 / PCI Express 3 / PCI Express 4 / PCI Express 5

Note: The number of PCIe slots and the slot naming can differ depending on the PCIe devices connected to your motherboard.

Intel VMD Technology

When this feature is set to Enabled, VMD support will be automatically enabled when a VROC key is detected by the BIOS. The options are Disabled and Enabled. This feature is available for configuration when the system supports a VROC key.

Notes: 

  • This feature is available when "NVMe Mode Switch" is set to Manual.

  • After you’ve enabled VMD in the BIOS on a PCIe slot, this PCIe slot will be dedicated for VMD use only, and it will no longer support any PCIe device. To re-activate this slot for PCIe use, disable VMD in the BIOS.

Bifurcation

This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for the PCIe port you specified. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

►PCI Express 5 Port A/Port C/Port E/Port G

Note: The number of PCIe slots and the slot naming can differ depending on the PCIe devices connected to your motherboard.

Requested Link Speed

Use this feature to configure the link speed of the PCIe port you specified. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), Gen 3 (8 GT/s), Gen 4 (16 GT/s), and Gen 5 (32 GT/s).

The following information is displayed.

  • Max Link Width

  • Current Link Width

  • Current Link Speed

Data Link Feature Exchange

Use this feature to enable data link feature negotiation in the Data Link Feature Capabilities (DLFCAP) register. The options are Disabled and Enabled.

PCIe Port Max Payload Size

Use this feature to configure the maximum payload size supported in PCIe device capabilities register for the device installed in the PCIe port. The options are 128B, 256B, 512B, and Auto.

MCTP

Enable this feature, Management Component Transport Protocol (MCTP), to support communications between devices in a platform management subsystem. MCTP's underlying device buses include SMBus/I2C, serial links, PCIe, and USB. The options are Disabled and Enabled.

Equalization Bypass To Highest Rate

Set this feature to Enabled to reduce the link training time for PCIe 5.0 device by skipping equalization of intermediate data rates. The options are Disabled and Enabled.

Intel VMD Technology

When this feature is set to Enabled, VMD support will be automatically enabled when a VROC key is detected by the BIOS. The options are Disabled and Enabled. This feature is available for configuration when the system supports a VROC key.