Memory Support

The X14DBG-LC motherboard supports ECC DDR5 memory with speeds up to 6400 MT/s in 1DPC configurations with a maximum of 16 DIMMs, and up to 5200 MT/s in 2DPC configurations with a maximum of 32 DIMMs.

Note: Memory speed/capacity support depends on the processors used in the system.

DDR5-6400 Memory Support for Intel® Xeon® 6700-Series Processors with E-Cores

Type

Ranks Per DIMM, Data Width (Stack)

DIMM Capacity (GB)

 

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

DRAM Density

 

16 Gb

24 Gb

32 Gb

1DPC/2SPC

2DPC/2SPC

1DPC

2DPC

1DPC

2DPC

1DPC

2DPC

+1.1 V

RDIMM

1Rx4

32 GB

-

-

-

-

-

 

6400, 6000, 5600, 5200, 4800 (DDR5-6400 rated RDIMMs only)

 

N/A

2Rx8

32 GB

-

-

-

-

-

N/A

2Rx4

64 GB

64 GB

96 GB

96 GB

-

-

5200, 4800 (DDR5-6400 rated RDIMMs only)

2Rx4

-

-

-

-

128 GB

128 GB
3DS RDIMM

4Rx4

 

 

 

 

256 GB

256 GB

CXL Memory Configuration Support for Intel® Xeon® 6700-Series Processors with E-Cores

Native DDR5 Memory Per Socket

CXL Memory Per Socket

Slot 0 DIMM Ranks

Slot 0 DIMM Capacity (GB)

DIMM Type

DRAM Density (Gb)

CXL Memory Channels

CXL Memory Type

CXL Capacity Per Device/Module

CXL Interleave

CXL Mode

2Rx4

64

10x4

16

2+2

DDR5 x8

64 GB

1x4*, 2x2, 4x1

1LM+Vol

2Rx4

64

10x4

16

1+1

DDR5 x16

128 GB

1x2*, 2x1

1LM+Vol

1Rx4

32

10x4

16

2

DDR5 x8

128 GB

1x2*

Intel Flat Memory Mode
Notes: 

  • The items with an asterisk (*) are the default settings in the BIOS.

  • The Intel® Xeon® 6700-series processors with E-cores CXL memory configurations are 1DPC ('Slot 0') only for native DDR5.

  • CXL Memory Channel: number of devices per root port, with root ports separated by "+," e.g. 2+2+2+2 = four root ports populated with two devices per root port.

  • CXL Interleave: sets x ways, e.g. 2x4 = One set of two modules, interleaved four-way.

  • CXL Modes:

    • 1LM + Vol = DDR5 ('1LM') and (volatile) CXL memory visible to SW as separate tiers, separately interleaved.

    • Flat Memory Mode = HW manages data movement between DDR5 and CXL memory, total capacity visible to SW.

DDR5-6400 Memory Support for Intel® Xeon® 6700/6500-Series Processors with P-Cores

Type

Ranks Per DIMM, Data Width (Stack)

DIMM Capacity (GB)

 

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

DRAM Density

 

16 Gb

24 Gb

32 Gb

1DPC/2SPC

2DPC/2SPC

1DPC

2DPC

1DPC

2DPC

1DPC

2DPC

+1.1 V

RDIMM

1Rx8

16 GB

-

24 GB

-

-

-

6400, 6000, 5600, 5200, 4800 (DDR5-6400 rated RDIMMs only)

5200, 4800 (DDR5-6400 rated RDIMMs only)

1Rx4

32 GB

-

48 GB

-

-

-

2Rx8

32 GB

32 GB

48 GB

-

-

-

2Rx4

64 GB

64 GB*^

96 GB

96 GB*^

128 GB*

128 GB*

3DS RDIMM

4Rx4

-

128 GB

-

-

 

-

8Rx4

-

256 GB

-

-

256 GB*^

256 GB*^-
Notes: 

  • The items marked with an asterisk (*) are supported in 1S/2S/4S systems. The items with circumflex (^) are supported in 8S systems. All others support 1S/2S only.

  • Intel Xeon 6700/6500-series processors with P-cores support up to 5200 MT/s speed in 2DPC configuration with 6400 MT/s DIMMs only. 5600 MT/s DIMMs are not supported.

  • Intel Xeon 6700/6500-series processors with P-cores support 1 DIMM per processor socket with the following DIMM configurations only: 16 GB/24 GB 1Rx8 and 32 GB/48 GB 1Rx8.

CXL Memory Configuration Support for Intel® Xeon® 6700/6500-Series Processors with P-Cores

Native DDR5 Memory Per Socket

CXL Memory Per Socket

Slot 0 DIMM Ranks

Slot 0 DIMM Capacity (GB)

DIMM Type

DRAM Density (Gb)

CXL Memory Channels

CXL Memory Type

CXL Capacity Per Device/Module

CXL Interleave

CXL Mode

4S and 8S support

2Rx4

96

10x4

24

2+2

DDR5 x8

96 GB#

1x4*, 2x2, 4x1

1LM+Vol

Yes

2Rx4

128

10x4

32

2+2

DDR4 x8#, DDR x8

128 GB

1x4*, 2x2, 4x1

1LM+Vol

Yes

2Rx4

128

10x4

32

2+2

DDR5 x8

128 GB

hetero x12

Hetero

Yes

2Rx4

64

10x4

16

2+2+2

DDR5 x8

128 GB

1x6*, 2x3, 3x2

1LM+Vol

No

2Rx4

64

10x4

16

2

DDR5 x8

128 GB

1x2*

1LM+Vol

No

2Rx4

64

10x4

16

1+1

DDR5 x16

2ch 128 GB

1x2*

Intel Flat Memory Mode

Yes
Notes: 

  • The items with an asterisk (*) are the default settings in the BIOS.

  • The Intel® Xeon® 6700/6500-series processors with P-cores CXL memory configurations are 1DPC ('Slot 0') only for native DDR5.

  • CXL Memory Channel: number of devices per root port, with root ports separated by "+". e.g. 2+2+2+2 = four root ports populated with two devices per root port.

  • CXL Interleave: sets x ways, e.g. 2x4 = One set of two modules, interleaved four-way

  • CXL Modes:

    • 1LM+Vol= Native DDR5 ('1LM') and (volatile) CXL memory visible to SW as separate tiers, separately interleaved.

    • Hetero x12 = DDR5 and (volatile) CXL memory interleaved together in one 12-way set.

    • Flat Memory Mode = HW manages data movement between DDR5 and CXL memory, total capacity visible to SW.

Memory Population Table (with 32 DIMM slots)

Intel® Xeon® 6700-Series Processor with E-Cores DDR5 Memory Population Table

(2 Processors and 32 DIMMs Installed, 1DPC)

1 Processor:

Memory Population Sequence

1 Processor and 1 DIMM (Recommended)

P1-DIMMA1

1 Processor and 4 DIMMs

P1-DIMMA1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1

1 Processor and 4 DIMMs

P1-DIMMB1/P1-DIMMD1/P1-DIMMH1/P1-DIMMF1

1 Processor and 8 DIMMs (Recommended)

P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMG1/P1-DIMMH1

2 Processor:

Memory Population Sequence

2 Processors and 2 DIMMs (Recommended)

P1-DIMMA1

P2-DIMMA1

2 Processors and 8 DIMMs

P1-DIMMA1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1

P2-DIMMA1/P2-DIMMC1/P2-DIMME1/P2-DIMMG1

2 Processors and 8 DIMMs

P1-DIMMB1/P1-DIMMD1/P1-DIMMF1/P1-DIMMH1

P2-DIMMB1/P2-DIMMD1/P2-DIMMF1/P2-DIMMH1

2 Processors and 16 DIMMs (Recommended)

P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMG1/P1-DIMMH1

P2-DIMMA1/P2-DIMMB1/P2-DIMMC1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1/P2-DIMMG1/P2-DIMMH1

Intel® Xeon® 6700-Series Processors with E-Cores DDR5 Memory Population Table

(2 Processors and 32 DIMMs Installed, 2DPC)

1 Processor:

Memory Population Sequence

1 Processor and 1 DIMM (Recommended)

P1-DIMMA1

1 Processor and 4 DIMMs

P1-DIMMA1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1

1 Processor and 4 DIMMs

P1-DIMMB1/P1-DIMMD1/P1-DIMMF1/P1-DIMMH1

1 Processor and 8 DIMMs

P1-DIMMB1/P1-DIMMB2/P1-DIMMD1/P1-DIMMD2/P1-DIMMF1/P1-DIMMF2/P1-DIMMH1/P1-DIMMH2

1 Processor and 8 DIMMs

P1-DIMMA1/P1-DIMMA2/P1-DIMMC1/P1-DIMMC2/P1-DIMME1/P1-DIMME2/P1-DIMMG1/P1-DIMMG2

1 Processor and 8 DIMMs (Recommended)

P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMG1/P1-DIMMH1

1 Processor and 16 DIMMs (Recommended)

P1-DIMMA1/P1-DIMMA2/P1-DIMMB1/P1-DIMMB2/P1-DIMMC1/P1-DIMMC2/P1-DIMMD1/P1-DIMMD2/P1-DIMME1/P1-DIMME2/P1-DIMMF1/P1-DIMMF2/P1-DIMMG1/P1-DIMMG2/P1-DIMMH1/P1-DIMMH2

2 Processor:

Memory Population Sequence

2 Processors and 2 DIMMs (Recommended)

P1-DIMMA1

P2-DIMMA1

2 Processors and 8 DIMMs

P1-DIMMA1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1

P2-DIMMA1/P2-DIMMC1/P2-DIMME1/P2-DIMMG1

2 Processors and 8 DIMMs

P1-DIMMB1/P1-DIMMD1/P1-DIMMF1/P1-DIMMH1

P2-DIMMB1/P2-DIMMD1/P2-DIMMF1/P2-DIMMH1

2 Processors and 16 DIMMs

P1-DIMMA1/P1-DIMMA2/P1-DIMMC1/P1-DIMMC2/P1-DIMME1/P1-DIMME2/P1-DIMMG1/P1-DIMMG2

P2-DIMMA1/P2-DIMMA2/P2-DIMMC1/P2-DIMMC2/P2-DIMME1/P2-DIMME2/P2-DIMMG1/P2-DIMMG2

2 Processors and 16 DIMMs

P1-DIMMB1/P1-DIMMB2/P1-DIMMD1/P1-DIMMD2/P1-DIMMF1/P1-DIMMF2/P1-DIMMH1/P1-DIMMH2

P2-DIMMB1/P2-DIMMB2/P2-DIMMD1/P2-DIMMD2/P2-DIMMF1/P2-DIMMF2/P2-DIMMH1/P2-DIMMH2

2 Processors and 16 DIMMs (Recommended)

P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMG1/P1-DIMMH1

P2-DIMMA1/P2-DIMMB1/P2-DIMMC1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1/P2-DIMMG1/P2-DIMMH1

2 Processors and 32 DIMMs(Recommended)

P1-DIMMA1/P1-DIMMA2/P1-DIMMB1/P1-DIMMB2/P1-DIMMC1/P1-DIMMC2/P1-DIMMD1/P1-DIMMD2/P1-DIMME1/P1-DIMME2/P1-DIMMF1/P1-DIMMF2/P1-DIMMG1/P1-DIMMG2/P1-DIMMH1/P1-DIMMH2

P2-DIMMA1/P2-DIMMA2/P2-DIMMB1/P2-DIMMB2/P2-DIMMC1/P2-DIMMC2/P2-DIMMD1/P2-DIMMD2/P2-DIMME1/P2-DIMME2/P2-DIMMF1/P2-DIMMF2/P2-DIMMG1/P2-DIMMG2/P2-DIMMH1/P2-DIMMH2
Notes: 

  • DIMMs must be all DDR5-6400 rated RDIMMs.

  • All DIMMs in a channel must have the same number of ranks (unless explicitly specified otherwise).

  • x8 DIMMs and x4 DIMMs cannot be mixed in the same channel or same processor socket.

  • Vendor mixing is not allowed.